Redefining the Future of Audio Chips with AI – EE Times Europe

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EE Times Europe
Dr. Zhou Zhenyu pointed out that AI applications, from edge AI to generative AI, have different requirements for computing power. Many edge AI applications are specialized and do not demand large models or substantial computing power. This is particularly true in Artificial Intelligence of Things (AIoT) fields such as speech interaction, audio processing, predictive maintenance, and health monitoring. Therefore, edge AI is crucial for widespread AI adoption, and integrating AI into battery-powered, low-energy IoT devices is key to making edge AI a reality.
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Generative AI is advancing at an unprecedented pace, rivaling the rapid evolution of mobile phones and the Internet. With AI models now growing to billions, or even tens of billions, of parameters, the demand for computing power is soaring. Statistics indicate that the global volume of data generated stood at approximately 10 exabytes (EB) in 2015. By 2025, it is projected to soar to 175 zettabytes (ZB), and by 2035, it could reach an astonishing 2,432 ZB. 
“Relying on the cloud to handle all this data is clearly unrealistic,” remarked Dr. Zhou Zhenyu, Chairman and CEO of Actions Technology Co., Ltd., in an interview with EE Times China. He explained that for AI to become truly ubiquitous and reach its full potential, computational tasks must be reasonably distributed between cloud servers and edge devices, such as personal computers (PCs), smartphones, cars, and Internet of Things (IoT) devices, instead of depending solely on the cloud. 
This collaborative architecture, in which cloud and edge AI work together, is known as Hybrid AI. As widely recognized in the industry, this architecture will provide a more powerful, efficient, and optimized AI experience. In other words, to make AI truly accessible and seamlessly integrated into everyday life, the deployment of edge AI is essential. 
Yet, as edge AI evolves, it faces two major challenges. First, we need to strike a balance between performance, power, and cost. While enhancing computing power, how can we achieve optimal results without pushing power and costs beyond reasonable limits, especially in battery-powered, low-power devices? Second, building a robust ecosystem is crucial. Similar to the development of central processing units (CPUs) and graphics processing units (GPUs), a unified ecosystem is necessary—one that includes toolchains, languages, compatibility, and ease of development—to drive the popularization and large-scale application of AI technologies. 
Edge AI seamlessly integrates machine learning into IoT devices, reducing reliance on cloud computing power. It delivers low-latency AI experiences, even in the absence of a network connection or during network congestion. Additionally, edge AI offers significant benefits, including low power consumption, enhanced data privacy, and greater personalization. These are the core advantages of deploying edge AI. 
Dr. Zhou Zhenyu pointed out that AI applications, from edge AI to generative AI, have different requirements for computing power. Many edge AI applications are specialized and do not demand large models or substantial computing power. This is particularly true in Artificial Intelligence of Things (AIoT) fields such as speech interaction, audio processing, predictive maintenance, and health monitoring. Therefore, edge AI is crucial for widespread AI adoption, and integrating AI into battery-powered, low-energy IoT devices is key to making edge AI a reality. 
According to ABI Research, the edge AI market is expanding rapidly. By 2028, the number of edge AI devices based on small and medium models is expected to reach four billion, growing at a compound annual growth rate (CAGR) of 32%. By 2030, 75% of these AIoT devices are expected to use high-energy-efficiency, specialized hardware. 
For example, mainstream wearable products such as headphones and smartwatches, along with other portable audio devices like Bluetooth speakers, consume power ranging from over ten milliwatts to several tens of milliwatts on average, with storage capacities below 10 megabytes (MB). This defines the resource budgets for low-power edge AI, particularly in wearables. 
In response, Actions Technology recently launched its “Actions Intelligence” strategy to drive the development of battery-powered, low-power audio edge AI applications with models under 10 million parameters (10M). The company aims to deliver 0.1-1 Tera Operations Per Second (TOPS) of general-purpose AI computing power for low-power AIoT devices, all within a power budget range of 10 mW-100 mW. 
This means that, as a company committed to delivering TOPS-level AI computing power with milliwatt-level power consumption to meet the low power and high energy efficiency demands of IoT devices, Actions Technology aims to achieve AI computing efficiency ranging from 10 TOPS/W to 100 TOPS/W through its “Actions Intelligence” strategy. 
While existing general-purpose CPUs and digital signal processors (DSPs) offer great flexibility in algorithms, their computing power and energy efficiency are insufficient to meet the targets outlined. The root cause lies in the traditional Von Neumann architecture, which separates memory and computation, resulting in the “memory wall” and “power wall” bottlenecks that hinder improvements in both computing power and energy efficiency. 
The “memory wall” refers to the issue where, in the Von Neumann architecture, the compute unit must first fetch data from memory and then write the results back after computation. However, because the processor and memory are designed with different processes, packaging, and requirements, memory access speed cannot keep up with the processor’s data processing rate. As a result, data flow becomes constrained, much like water trickling through a narrow funnel. No matter how much data the processor sends, memory can only handle a small amount at a time. This narrow data exchange path and the resulting high energy consumption create a “memory wall” between storage and computation. 
Furthermore, in traditional architectures, the power required to transfer data from memory to the compute unit is several times higher than the power used for computation itself. This means that a large portion of energy and time is consumed in data transfer rather than computation. The frequent migration of data between memory and the processor leads to significant power consumption, known as the “power wall”. For example, test results show that Intel’s 7nm CPU consumes around 63% of its power on data transfer rather than computation. 
Public data from Arm and Cadence reveals that using the 28/22nm process, ARM A7 CPU, running at 1.2 gigahertz (GHz), delivers 0.01 TOPS of theoretical computing power but consumes 100 mW of power, achieving an ideal energy efficiency of just 0.1 TOPS/W. Similarly, HiFi4 DSP, running at 600 megahertz (MHz), delivers 0.01 TOPS but consumes 40 mW of power, achieving an ideal energy efficiency of 0.25 TOPS/W. Even though Arm China’s specialized Neural Processing Unit (NPU) series “Zhouyi” has made notable improvements in energy efficiency, it still only achieves 2 TOPS/W. 
According to Dr. Zhou Zhenyu, “The best way to address the ‘memory wall’ and ‘power wall’ is by adopting a Computing-in-Memory (CIM) architecture based on Static Random-Access Memory (SRAM).” The core idea behind CIM is to move computation, either partially or entirely, into memory so that memory cells can perform computations directly. This eliminates the need for separate compute units and enables memory cells to handle both storage and computation, thereby reducing data access and storage latency, as well as power consumption. In essence, CIM integrates memory and computation. By relying entirely on memory for computation, CIM enables finer-grained parallelism that significantly enhances performance, particularly in terms of energy efficiency. 
While implementing the “Memory-Computation Integration” idea is no easy job, AI is inherently a neural network, made up of countless neurons working together to form complex computation patterns. Machine learning algorithms rely heavily on matrix operations, which are ideal for distributed parallel processing. As such, CIM is an ideal solution for AI applications. 
“Edge AI deployment requires innovation.” 
Integrating computation into memory fundamentally hinges on choosing the right storage medium, which is crucial for both cost and success. Dr. Zhou Zhenyu noted that the company aims to integrate the computational capabilities of low-power edge AI and other system-on-chip (SoC) modules into a single chip. This approach precludes the use of Double Data Rate Random-Access Memory (DDR RAM) and Flash that require special processes. Instead, SRAM adopts the Complementary Metal-Oxide-Semiconductor (CMOS) process, along with emerging Non-volatile Random-Access Memory (NVRAM) technologies, such as Resistive Random-Access Memory (RRAM) and Magnetoresistive Random-Access Memory (MRAM), is more suitable. 
SRAM, which adopts well-established processes, can be upgraded to stay compatible with advanced processes. It offers fast read/write speeds, high energy efficiency, and unlimited read/write cycles. Its only limitation is low memory density, which, nevertheless, is sufficient to meet the computing power needs of most edge AI applications. In the short term, SRAM is the optimal solution for achieving high energy efficiency in low-power edge AI devices. It ensures fast deployment with no mass production risks. 
In the long term, emerging NVRAM technologies such as RRAM, which have a higher density than SRAM and lower read power consumption, can be integrated into SoCs, opening up new possibilities for CIM architectures. However, RRAM technology is still in its early stages with risks in mass production, and the most advanced manufacturing process is currently limited to 22 nm. Additionally, a significant drawback is its limited number of write cycles, beyond which permanent damage may occur. Therefore, Dr. Zhou Zhenyu envisioned a hybrid technology combining SRAM and RRAM as the optimal solution once RRAM is fully developed. In this solution, SRAM-based CIM would handle AI computations that require frequent writes, while RRAM-based CIM would be used for tasks with fewer or less frequent writes. This hybrid solution is expected to provide greater computing power and improved energy efficiency. 
Currently, there are two mainstream methods to implement SRAM-based CIM circuits in the industry. Method 1 uses digital circuits to perform computations as close as possible to the SRAM. However, since the compute unit is not actually part of the SRAM array, this method is essentially a near-memory technology. Method 2 requires leveraging the features of certain analog devices within the SRAM medium to perform analog computations. While this method delivers true CIM, it has significant drawbacks. The precision of analog computations is compromised, and consistency and manufacturability may not be guaranteed. This means that the same chip might produce inconsistent results under different conditions at different times. Additionally, this method requires an Analog-to-Digital Converter (ADC) and a Digital-to-Analog Converter (DAC) to exchange data between the analog computation-based CIM and other digital modules. This creates limitations in data flow management and interface interaction design, hindering operational efficiency improvement. 
To address these issues, Actions Technology has rolled out its Mixed-Mode SRAM-based CIM (MMSCIM) technology, which uses customized analog designs in the SRAM medium to achieve digital computation circuits. This breakthrough delivers true CIM while maintaining computational precision and ensuring consistent mass production quality. 
Dr. Zhou Zhenyu highlighted several benefits of MMSCIM. First, MMSCIM offers better energy efficiency than purely digital solutions, nearly matching the energy efficiency of fully analog systems. Second, MMSCIM eliminates the need for ADCs/DACs, ensuring digital precision, high reliability, and consistent quality in mass production, which are the inherent strengths of digital technology. Third, MMSCIM is adaptable to process upgrades and can be easily transferred across different semiconductor fabrication plants (FABs). Fourth, MMSCIM enables easy speed improvement and optimization of performance, power, and area (PPA). Lastly, MMSCIM’s adaptability to sparse matrices further enhances energy efficiency and reduces power consumption. 
For high-quality audio processing and speech applications, MMSCIM is the optimal architecture for low-power edge AI audio technologies of the future. By eliminating the need for data transfers between memory and storage, MMSCIM significantly reduces latency, boosts performance, and minimizes power consumption and heat generation. For integrating AI technologies into battery-powered IoT devices that demand maximum energy efficiency, where every milliwatt is crucial for optimizing AI computing power, Actions Technology’s MMSCIM technology provides the ideal solution to bring edge AI to life. 
According to the first MMSCIM roadmap unveiled by Actions Technology, GEN1 MMSCIM was launched in 2024. Built on a 22nm process, GEN1 MMSCIM delivers 100 Giga Operations Per Second (GOPS) per core, with energy efficiency reaching 6.4 TOPS/W @INT8. Thanks to its ability to adapt to sparse matrices, energy efficiency can be further optimized with models that have reasonable sparsity (i.e. when some parameters are zero). Depending on the level of sparsity, energy efficiency could exceed 10 TOPS/W. 
In 2025, Actions Technology plans to release GEN2 MMSCIM, also built on a 22nm process, offering a threefold performance increase over GEN1. Each core of GEN2 MMSCIM will provide 300 GOPS of computing power, support transformer models, and achieve an energy efficiency of 7.8 TOPS/W @INT8. By 2026, GEN3 MMSCIM will be introduced using a 12nm process, with each core delivering one TOPS of computing power, supporting transformer models, and achieving energy efficiency up to 15.6 TOPS/W @INT8. 
Each generation of MMSCIM technology boosts total computing power through core superposition. For example, GEN2 MMSCIM, with 300 GOPS per core, can achieve more than one TOPS of computing power by combining four cores. 
The next generation of MMSCIM-based edge AI audio chips from Actions Technology includes three series: ATS323X for low-latency private wireless audio, ATS286X for Bluetooth AI audio, and ATS362X for AI DSP applications. 
Each series features a heterogeneous architecture combining a CPU (ARM), DSP (HiFi5), and NPU (MMSCIM). Actions Technology has fused MMSCIM and the advanced HiFi5 DSP into the “Actions Intelligence NPU (AI-NPU)” architecture, ensuring high flexibility and energy efficiency through collaborative computing. In this architecture, MMSCIM supports basic, general-purpose AI operators, delivering high computing power with low power consumption. As new AI models and operators are springing up, HiFi5 DSP supports emerging special operators that MMSCIM does not cover. 
These edge AI chips can support AI models with up to one million parameters on-chip, with the option to expand to eight million parameters using external Pseudo-Static Random-Access Memory (PSRAM). Additionally, Actions Technology has developed “ANDT”(Actions NPU Development Tools), an AI development tool designed for the AI-NPU architecture. This tool supports standard AI development workflows such as TensorFlow, HDF5, PyTorch, and ONNX. ANDT automatically and reasonably splits the given AI algorithms between the CIM and HiFi5 DSP, facilitating the development of low-power edge audio AI ecosystems. The ANDT toolchain makes it easy for developers to integrate algorithms and bring products to market quickly. 
Dr. Zhou Zhenyu shared energy efficiency test results for GEN1 MMSCIM and HiFi5 DSP. In a test with a 717K-parameter Convolutional Neural Network (CNN) model for environmental noise cancellation at 500 MHz, MMSCIM reduced power consumption by nearly 98% compared to HiFi5 DSP, achieving a 44-fold increase in energy efficiency. In another test using a 935K-parameter CNN model for speech recognition, MMSCIM cut power consumption by 93%, delivering a 14-fold increase in energy efficiency. 
In tests using more complex network models for environmental noise cancellation, GEN1 MMSCIM reduced power consumption by 89% compared to HiFi5 DSP when running a Deep Recurrent Neural Network, by 88% with a Convolutional Recurrent Neural Network, and by 76% with a Convolutional Deep Recurrent Neural Network. Under identical conditions, GEN1 MMSCIM delivered 16.1 times the AI computing power of HiFi5 DSP when running a specific CNN-Con2D operator model. 
Audio processing is both complex and systematic. High-quality audio demands more than just a hardware signal chain, which includes preamplifiers, ADCs/DACs, audio processing, codecs, and analog amplifiers. It requires each process to meet quantifiable objective metrics such as high signal-to-noise ratios, low noise floors, wide dynamic ranges, and high linearity. Equally important is understanding human auditory preferences and seamlessly incorporating both electrical science and acoustics into the design. 
Dr. Zhou Zhenyu noted, “Yes, it is, particularly when it comes to the subjective part. There’s no universal definition of pleasant sound; everyone has their own preferences, and each brand has its own signature style.” With over 20 years of experience in the audio industry, Dr. Zhou Zhenyu attributed Actions Technology’s subjective and objective recognition as a leading international brand to its “profound expertise and wealth of experience”. This enables the company’s R&D team to understand what constitutes natural, clean, and pleasant sound, and make the necessary adjustments to blend chips, algorithms, and acoustics into perfect harmony. 
Another key trend is the rapid evolution of AI, which opens up new possibilities in the integration of AI and audio. AI is transforming the audio industry through innovations in speech recognition, noise control, speech translation, keyword spotting, voice enhancement, and voice separation. These advancements are driving innovations and improvements in audio devices and systems, providing consumers with richer and more personalized experiences, whether at home, for personal music enjoyment, or in commercial applications. 
Dr. Zhou Zhenyu saw AI as a new type of computation, which uses neural network-based deep learning computation to replace traditional symbolic logic computation in the audio field, greatly enhancing user experiences. He explained, “In my view, every audio product should be improved using AI, especially when combined with specialized, low-power, efficient hardware. This can significantly boost model efficiency.” 
Currently, the market for low-latency, high-quality audio products such as wireless home theater systems, gaming headsets, and microphones is dominant. Dr. Zhou Zhenyu predicted that in the future, more niche markets will emerge, such as more specialized live-streaming microphones and other wireless devices requiring ultra-low latency. The demand for 7.1.4-channel, i.e. 12-channel, surround sound systems, which prioritize a fully immersive experience, will challenge wireless transmission bandwidth, sampling rates, and latency. This will fuel the need for high-bandwidth private wireless technology, AI-powered audio processing, and new codec technologies to meet the demand for ultra-low latency and exceptional sound quality. 
According to QYResearch, the global wireless audio equipment market, including soundbars, headsets, microphones, and wireless speakers, reached RMB199.628 billion in 2023, with China’s market accounting for RMB65.438 billion. This figure is expected to grow to RMB582.085 billion by 2029, with a CAGR of around 19.25%. Major markets include business, automotive, consumer, and home applications. 
The wearable device market dominated by products such as smart glasses, smart headphones, smartwatches, and smart bracelets is also showing strong potential. IDC forecasted a 6.1% year-on-year increase in global wearable device shipments in 2024, reaching 537.9 million units, with hearables making up 57.7% of this total. Canalys also reported that in Q2 2024, global smart personal audio shipments hit 110 million units, marking the highest-ever Q2 shipment figure, with a 10.6% year-on-year growth.  
In this context, the exploration and application of AI technology will undoubtedly become a trending topic across industries, unlocking the huge potential of AI technology to enhance user experiences. For companies, the shift from being single-product suppliers to offering system solutions will become the norm. Businesses will increasingly need to build unique AI ecosystems through open platforms and tools, enabling customers to develop differentiated solutions based on fundamental components, while balancing performance, cost, and power. 
From ChatGPT to Sora and from text-to-text and text-to-image to text-to-video, image-to-text, and video-to-text technologies, cloud-based large models continue to push the boundaries of AI capabilities. However, the journey ahead for AI development remains long. The shift from cloud to edge computing is emerging as a major trend. With its benefits of low latency, personalized services, and enhanced data privacy, edge AI is set to become increasingly crucial for IoT devices, opening up exciting new opportunities across industries such as manufacturing, automobiles, and consumer goods.  
Gretaxiong@actionstech.com
www.actionstech.com

Lefeng Shao, principal analyst of Aspencore China, once worked as an engineer for several wafer equipment vendors. He joined Aspencore in 2007 and over the last 12 years, he has written hundreds of articles on the semiconductor industry, focusing on the embedded system market.

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